Memory device

  • Inventors: NODA MASANORI
  • Assignees: Sony Corp
  • Publication Date: September 09, 1991
  • Publication Number: JP-H03205866-A

Abstract

PURPOSE: To enhance reliability without complicating a manufacturing process by laminating a conductive film of the same layer as a conductive film for forming one and the other electrodes of a capacity element on a contact part of a transistor with a bit line. CONSTITUTION: In a memory device having a memory cell formed of one transistor 12 and one capacity element 25, a first conductive film 17 of the same layer as a conductive film for forming one electrode of the element 25 is laminated on an impurity region 14a in a state in contact with the region 14a of the transistor 12, a second conductive film 23 of the same layer as a conductive film for forming the other electrode of the element 25 is laminated on the film 17 in a state in contact with the film 17, and a bit line 32 is connected to the film 17. COPYRIGHT: (C)1991,JPO&Japio

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Cited By (7)

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    FR-2766293-A1January 22, 1999United Microelectronics CorpProcede de fabrication d'un circuit integre comportant a la fois des circuits logiques et une memoire vive dynamique incorporee
    FR-2775122-A1August 20, 1999United Integrated Circuits CorpProcede de fabrication d'une memoire vive dynamique a structure enterree
    JP-H04196481-AJuly 16, 1992Nec CorpSemiconductor storage device
    NL-1007804-C2June 17, 1999United Microelectronics CorpWerkwijze voor het vervaardigen van een geïntegreerde circuit-inrichting met ingebedde DRAM circuits en logische circuits op een enkel substraat.
    NL-1009204-C2November 22, 1999United Integrated Circuits CorWerkwijze voor het vervaardigen van een ingebed dynamisch willekeurig toegankelijk geheugen.
    US-5998251-ADecember 07, 1999United Microelectronics Corp.Process and structure for embedded DRAM
    US-6048762-AApril 11, 2000United Integrated Circuits Corp.Method of fabricating embedded dynamic random access memory